{
  "contractVersion": "1.24.0",
  "license": {
    "name": "CC BY 4.0",
    "url": "https://creativecommons.org/licenses/by/4.0/",
    "attribution": "AI Compute Tracker (aicomputetracker.com), CC BY 4.0; third-party terms apply to data from Chip vendor documentation",
    "sources": [
      {
        "id": "vendor-specs",
        "name": "Chip vendor documentation",
        "attribution": "Specifications: each vendor's own documentation",
        "terms": null,
        "termsVersion": null,
        "redistribution": "pending-counsel",
        "license": "Third-party terms apply"
      }
    ]
  },
  "review": {
    "reviewedAt": "2026-10-24",
    "observationsAsOf": "2026-10-24",
    "coverage": "partial",
    "retainedSince": "2026-10-15",
    "note": "Partial review on Oct 24: every row's launch month was re-checked against vendor releases, filings and launch posts, and every purchase-price estimate against named reports; a month is confirmed only where one of those sources dates it, and a price is shown only with the report it rests on. Six rows were added from NVIDIA's documents: GB300 NVL72, RTX PRO 6000 Blackwell Server, H100 PCIe, H100 NVL, GH200 and L4. The complete review of Oct 15 stands for every other field. No vendor publishes Trainium2 board power (the table keeps SemiAnalysis's estimate), a tensor BF16 rate for Maia 200, per-chip power for Google's TPUs, GPU-only power for GH200 or a dense tensor rate for the RTX PRO 6000."
  },
  "latestSpecReviewAt": "2026-10-24",
  "note": "FLOPS are dense tensor throughput in TFLOPS with FP32 accumulate — never vendor sparsity numbers or FP16-accumulate rates — and each precision (FP16/BF16, FP8, FP4) keeps its own field, never mixed in one comparison. Memory is in each row's memoryUnit (GB or GiB), bandwidth in TB/s, TDP in watts; null means unsupported or undisclosed. est: true marks a row containing unofficial or estimated figures. A row's specReview names the fields re-read against the vendor documents it cites; other fields keep earlier review dates.",
  "accelerators": [
    {
      "id": "mi400",
      "vendor": "AMD",
      "name": "Instinct MI455X",
      "launch": "2026-10",
      "availability": "ramping",
      "fp16Bf16DenseTflops": 5033,
      "fp8DenseTflops": 20133,
      "fp4DenseTflops": 40265,
      "memory": 432,
      "memoryUnit": "GB",
      "memoryBandwidthTBs": 23.3,
      "tdpW": 2500,
      "interconnect": "Helios rack-scale (72 GPU)",
      "processNode": "TSMC 2/3nm",
      "cloudOnly": false,
      "est": true,
      "notes": "MI400 Series flagship: CDNA 5 with HBM4. AMD's 20.1 PF FP8 and 40.3 PF MXFP4 are dense rates; it lists sparsity only for FP16/BF16/INT8. Customers: OpenAI 6 GW, Meta up to 6 GW (custom MI450-based GPU), Anthropic up to 2 GW. Launch month is an estimate.",
      "specReview": {
        "reviewedAt": "2026-10-15",
        "fields": [
          "name",
          "availability",
          "fp16Bf16DenseTflops",
          "fp8DenseTflops",
          "fp4DenseTflops",
          "memory",
          "memoryBandwidthTBs",
          "tdpW",
          "interconnect",
          "processNode"
        ],
        "note": "Row is the MI455X, whose dense rates AMD publishes directly (5.0 PF BF16, 20.1 PF FP8, 40.3 PF MXFP4); 23.3 TB/s HBM4 bandwidth and 2,500 W maximum board power.",
        "sources": [
          {
            "label": "AMD Instinct MI455X specifications",
            "url": "https://www.amd.com/en/products/accelerators/instinct/mi400/mi455x.html"
          },
          {
            "label": "AMD Instinct MI455X brochure",
            "url": "https://www.amd.com/content/dam/amd/en/documents/products/accelerators/instinct/amd-instinct-mi455x_brochure.pdf"
          },
          {
            "label": "AMD Helios MI455X brief (board power)",
            "url": "https://www.amd.com/content/dam/amd/en/documents/products/rackscale-solutions/amd-helios-instinct-mi455X-5-reasons-why.pdf"
          }
        ]
      }
    },
    {
      "id": "rubin",
      "vendor": "NVIDIA",
      "name": "Rubin GPU",
      "launch": "2026-08",
      "availability": "ramping",
      "fp16Bf16DenseTflops": 4000,
      "fp8DenseTflops": 17500,
      "fp4DenseTflops": 35000,
      "memory": 288,
      "memoryUnit": "GB",
      "memoryBandwidthTBs": 19.2,
      "tdpW": 1800,
      "interconnect": "NVLink 6 · 3 TB/s",
      "processNode": null,
      "cloudOnly": false,
      "est": true,
      "notes": "NVIDIA's individual-GPU table specifies dense BF16, FP8/FP6 training and NVFP4 training directly. FP4 here uses its 35 PF dense training figure, not the separate 50 PF sparse inference claim. Bandwidth and NVLink follow the Oct 2026 NVL72 figures (19.2 TB/s, 3 TB/s); older HGX pages still say 22 and 3.6 TB/s. 1,800 W is NVIDIA's NVL4 benchmark power assumption, and launch timing is an estimate.",
      "specReview": {
        "reviewedAt": "2026-10-15",
        "fields": [
          "name",
          "availability",
          "fp16Bf16DenseTflops",
          "fp8DenseTflops",
          "fp4DenseTflops",
          "memory",
          "memoryBandwidthTBs",
          "tdpW",
          "interconnect"
        ],
        "note": "Rubin GPU column: 19.2 TB/s and NVLink 6 at 3 TB/s (HGX and preliminary DGX Rubin NVL8 pages still imply 22 and 3.6 TB/s). 1,800 W is the datasheet's NVL4 benchmark power; NVIDIA states no process node.",
        "sources": [
          {
            "label": "NVIDIA Vera Rubin NVL72",
            "url": "https://www.nvidia.com/en-us/data-center/vera-rubin-nvl72/"
          },
          {
            "label": "NVIDIA Vera Rubin datasheet",
            "url": "https://dam-cdn.nvd.orangelogic.com/AssetLink/56p68o47y6f1yucpubl0ump1c0aif422.pdf"
          }
        ]
      }
    },
    {
      "id": "maia200",
      "vendor": "Microsoft",
      "name": "Maia 200",
      "launch": "2026-01",
      "availability": "shipping",
      "fp16Bf16DenseTflops": null,
      "fp8DenseTflops": 5072,
      "fp4DenseTflops": 10145,
      "memory": 216,
      "memoryUnit": "GB",
      "memoryBandwidthTBs": 7,
      "tdpW": 750,
      "interconnect": "Ethernet scale-up",
      "processNode": "3nm",
      "cloudOnly": true,
      "est": false,
      "notes": "Microsoft’s inference chip, live in Azure Jan 2026; serves GPT-5.x-class models at claimed 30% better perf/$. Its 1,268 TFLOPS BF16 peak runs on the vector unit (the tensor unit handles FP8/FP6/FP4), so no tensor BF16 rate is listed.",
      "specReview": {
        "reviewedAt": "2026-10-15",
        "fields": [
          "availability",
          "fp8DenseTflops",
          "fp4DenseTflops",
          "memory",
          "memoryBandwidthTBs",
          "tdpW",
          "interconnect",
          "processNode"
        ],
        "note": "Peak-specification table: 5,072 TFLOPS FP8, 10,145 TFLOPS FP4, 750 W. BF16 (1,268 TFLOPS) is a vector-unit rate, so tf16 stays empty.",
        "sources": [
          {
            "label": "Microsoft Maia 200 announcement",
            "url": "https://blogs.microsoft.com/blog/2026/01/26/maia-200-the-ai-accelerator-built-for-inference/"
          },
          {
            "label": "Maia 200 architecture deep dive",
            "url": "https://techcommunity.microsoft.com/blog/azureinfrastructureblog/deep-dive-into-the-maia-200-architecture/4489312"
          }
        ]
      }
    },
    {
      "id": "trainium3",
      "vendor": "AWS",
      "name": "Trainium3",
      "launch": "2025-12",
      "availability": "shipping",
      "fp16Bf16DenseTflops": 671,
      "fp8DenseTflops": 2517,
      "fp4DenseTflops": 2517,
      "memory": 144,
      "memoryUnit": "GiB",
      "memoryBandwidthTBs": 4.9,
      "tdpW": null,
      "interconnect": "NeuronLink v4 · 2.56 TB/s",
      "processNode": "3nm",
      "cloudOnly": true,
      "est": false,
      "notes": "Per-chip NeuronCore-v4 specifications: MXFP8 and MXFP4 share the published throughput; dense BF16 is lower and must not be inferred by halving FP8.",
      "specReview": {
        "reviewedAt": "2026-10-15",
        "fields": [
          "availability",
          "fp16Bf16DenseTflops",
          "fp8DenseTflops",
          "fp4DenseTflops",
          "memory",
          "memoryUnit",
          "memoryBandwidthTBs",
          "tdpW",
          "interconnect",
          "processNode"
        ],
        "note": "671 TFLOPS dense BF16; 2,517 TFLOPS MXFP8 and MXFP4. Dense BF16 cannot be inferred by halving FP8; AWS publishes no per-chip power.",
        "sources": [
          {
            "label": "AWS Neuron Trainium3 architecture",
            "url": "https://awsdocs-neuron.readthedocs-hosted.com/en/latest/about-neuron/arch/neuron-hardware/trainium3.html"
          },
          {
            "label": "Amazon Trainium3 UltraServers launch",
            "url": "https://press.aboutamazon.com/2025/12/trainium3-ultraservers-now-available-enabling-customers-to-train-and-deploy-ai-models-faster-at-lower-cost"
          }
        ]
      }
    },
    {
      "id": "tpu-v7",
      "vendor": "Google",
      "name": "TPU v7 (Ironwood)",
      "launch": "2025-11",
      "availability": "shipping",
      "fp16Bf16DenseTflops": 2307,
      "fp8DenseTflops": 4614,
      "fp4DenseTflops": null,
      "memory": 192,
      "memoryUnit": "GiB",
      "memoryBandwidthTBs": 7.38,
      "tdpW": null,
      "interconnect": "ICI · 9,216-chip pods",
      "processNode": null,
      "cloudOnly": true,
      "est": false,
      "notes": "Google Cloud TPU7x. Compute is per chip, comprising two TensorCores; memory capacity follows the documentation's GiB specification. GA since March 2026 and available on demand (quota required); Spot, Flex-start and calendar-mode reservations are allowlist-restricted.",
      "specReview": {
        "reviewedAt": "2026-10-15",
        "fields": [
          "availability",
          "fp16Bf16DenseTflops",
          "fp8DenseTflops",
          "fp4DenseTflops",
          "memory",
          "memoryUnit",
          "memoryBandwidthTBs",
          "tdpW",
          "interconnect"
        ],
        "note": "Current TPU7x table (7,380 GB/s shown as 7.38 TB/s); GA since March 31, 2026. No FP4 rate or per-chip power is published.",
        "sources": [
          {
            "label": "Google Cloud TPU7x architecture",
            "url": "https://docs.cloud.google.com/tpu/docs/tpu7x"
          },
          {
            "label": "Google Cloud TPU release notes",
            "url": "https://docs.cloud.google.com/tpu/docs/release-notes"
          }
        ]
      }
    },
    {
      "id": "b300",
      "vendor": "NVIDIA",
      "name": "B300 (HGX Blackwell Ultra)",
      "launch": "2025-09",
      "availability": "shipping",
      "fp16Bf16DenseTflops": 2250,
      "fp8DenseTflops": 4500,
      "fp4DenseTflops": 13500,
      "memory": 270,
      "memoryUnit": "GB",
      "memoryBandwidthTBs": 7.7,
      "tdpW": 1100,
      "interconnect": "NVLink 5 · 1.8 TB/s",
      "processNode": "TSMC 4NP",
      "cloudOnly": false,
      "est": true,
      "notes": "HGX variant: dense FP4 is 108 PF per eight-GPU system divided by eight. Current datasheet specifies 270 GB and 1,100 W; GB300 NVL72 has different per-GPU specifications.",
      "specReview": {
        "reviewedAt": "2026-10-15",
        "fields": [
          "name",
          "availability",
          "fp16Bf16DenseTflops",
          "fp8DenseTflops",
          "fp4DenseTflops",
          "memory",
          "memoryBandwidthTBs",
          "tdpW",
          "interconnect",
          "processNode"
        ],
        "note": "Current HGX column specifies 270 GB, 7.7 TB/s and 1,100 W; older reference tables list 288 GB. Dense FP4 is 108 PF/system ÷ 8 (the per-GPU figure is rounded to 14 PF in the PDF).",
        "sources": [
          {
            "label": "NVIDIA Blackwell Ultra datasheet, page 5",
            "url": "https://dam-cdn.nvd.orangelogic.com/AssetLink/1k0p832eq8r5ca0u5383ie5o4tp3bst1.pdf"
          },
          {
            "label": "NVIDIA HGX specifications",
            "url": "https://www.nvidia.com/en-us/data-center/hgx/"
          }
        ]
      }
    },
    {
      "id": "mi355x",
      "vendor": "AMD",
      "name": "Instinct MI355X",
      "launch": "2025-09",
      "availability": "shipping",
      "fp16Bf16DenseTflops": 2500,
      "fp8DenseTflops": 5000,
      "fp4DenseTflops": 10100,
      "memory": 288,
      "memoryUnit": "GB",
      "memoryBandwidthTBs": 8,
      "tdpW": 1400,
      "interconnect": "Infinity Fabric",
      "processNode": "TSMC 3/6nm",
      "cloudOnly": false,
      "est": true,
      "notes": "CDNA 4, liquid-cooled. Values use AMD's dense BF16/OCP-FP8 and MXFP4 specifications; sparse headline rates are excluded.",
      "specReview": {
        "reviewedAt": "2026-10-15",
        "fields": [
          "name",
          "availability",
          "fp16Bf16DenseTflops",
          "fp8DenseTflops",
          "fp4DenseTflops",
          "memory",
          "memoryBandwidthTBs",
          "tdpW",
          "interconnect",
          "processNode"
        ],
        "note": "Use explicit dense BF16/OCP-FP8 and MXFP4 rates, not the adjacent sparse headline values.",
        "sources": [
          {
            "label": "AMD MI355X specifications",
            "url": "https://www.amd.com/en/products/accelerators/instinct/mi350/mi355x.html"
          },
          {
            "label": "AMD MI355X brochure",
            "url": "https://www.amd.com/content/dam/amd/en/documents/instinct-tech-docs/product-briefs/amd-instinct-mi355x-gpu-brochure.pdf"
          }
        ]
      }
    },
    {
      "id": "gb300",
      "vendor": "NVIDIA",
      "name": "GB300 NVL72 (per GPU)",
      "launch": "2025-08",
      "availability": "shipping",
      "fp16Bf16DenseTflops": 2500,
      "fp8DenseTflops": 5000,
      "fp4DenseTflops": 15000,
      "memory": 279,
      "memoryUnit": "GB",
      "memoryBandwidthTBs": 8,
      "tdpW": 1400,
      "interconnect": "NVLink 5 · 1.8 TB/s",
      "processNode": "TSMC 4NP",
      "cloudOnly": false,
      "est": true,
      "notes": "One of the 72 Blackwell Ultra GPUs in a GB300 NVL72 rack; dense FP4 is 1.5× GB200's, with BF16 and FP8 unchanged. Launch month is an estimate: the first racks shipped in July 2025 and the first cloud instances followed in August.",
      "specReview": {
        "reviewedAt": "2026-10-24",
        "fields": [
          "name",
          "availability",
          "fp16Bf16DenseTflops",
          "fp8DenseTflops",
          "fp4DenseTflops",
          "memory",
          "memoryBandwidthTBs",
          "tdpW",
          "interconnect"
        ],
        "note": "Datasheet's individual-GPU GB300 NVL72 column: FP4 20 | 15 PF sparse | dense; FP8 10 and BF16 5 PF sparse, halved as the footnote directs to 5 and 2.5 PF; 279 GB HBM3E at 8 TB/s; TDP configurable up to 1,400 W. The rack page's totals divided by 72 agree. The process node comes from NVIDIA's Blackwell Ultra technical blog.",
        "sources": [
          {
            "label": "NVIDIA Blackwell Ultra datasheet, page 5",
            "url": "https://dam-cdn.nvd.orangelogic.com/AssetLink/1k0p832eq8r5ca0u5383ie5o4tp3bst1.pdf"
          },
          {
            "label": "NVIDIA GB300 NVL72 specifications",
            "url": "https://www.nvidia.com/en-us/data-center/gb300-nvl72/"
          }
        ]
      }
    },
    {
      "id": "rtxpro6000",
      "vendor": "NVIDIA",
      "name": "RTX PRO 6000 Blackwell Server",
      "launch": "2025-07",
      "availability": "shipping",
      "fp16Bf16DenseTflops": null,
      "fp8DenseTflops": null,
      "fp4DenseTflops": null,
      "memory": 96,
      "memoryUnit": "GB",
      "memoryBandwidthTBs": 1.597,
      "tdpW": 600,
      "interconnect": "PCIe 5.0",
      "processNode": null,
      "cloudOnly": false,
      "est": true,
      "notes": "Passively cooled data-center Blackwell card with 96 GB of GDDR7 and no NVLink. NVIDIA publishes only headline tensor rates, which its Workstation sibling footnotes as sparse, so no dense rate is shown. Launch month is an estimate from the first cloud instances.",
      "specReview": {
        "reviewedAt": "2026-10-24",
        "fields": [
          "name",
          "availability",
          "memory",
          "memoryBandwidthTBs",
          "tdpW",
          "interconnect"
        ],
        "note": "96 GB GDDR7 with ECC at 1,597 GB/s, up to 600 W (300 W minimum), PCIe 5.0 x16, NVLink not supported. NVIDIA's 1 / 2 / 4 PFLOPS FP16-BF16 / FP8 / FP4 headlines are not marked dense, and the Workstation Edition footnotes the same FP4 figure as sparse, so no dense rate is recorded.",
        "sources": [
          {
            "label": "NVIDIA RTX PRO 6000 Blackwell Server Edition",
            "url": "https://www.nvidia.com/en-us/data-center/rtx-pro-6000-blackwell-server-edition/"
          },
          {
            "label": "RTX PRO 6000 Blackwell Server Edition datasheet",
            "url": "https://dam-cdn.nvd.orangelogic.com/AssetLink/707m1632ypg4du1fj3ci1jo3h4w1k78j.pdf"
          },
          {
            "label": "RTX PRO 6000 Blackwell Server Edition product brief (SP-12355)",
            "url": "https://dam-cdn.nvd.orangelogic.com/AssetLink/3km2720jiy76r06ctf8mxg21743p1058.pdf"
          }
        ]
      }
    },
    {
      "id": "gb200",
      "vendor": "NVIDIA",
      "name": "GB200 NVL72 (per GPU)",
      "launch": "2025-02",
      "availability": "shipping",
      "fp16Bf16DenseTflops": 2500,
      "fp8DenseTflops": 5000,
      "fp4DenseTflops": 10000,
      "memory": 186,
      "memoryUnit": "GB",
      "memoryBandwidthTBs": 8,
      "tdpW": 1200,
      "interconnect": "NVLink 5 · 1.8 TB/s",
      "processNode": "TSMC 4NP",
      "cloudOnly": false,
      "est": true,
      "notes": "One of the 72 Blackwell GPUs in a GB200 NVL72 rack (two per Grace Blackwell superchip); rentals are priced per GPU. Launch month is an estimate: the first generally available cloud instances were announced in February 2025.",
      "specReview": {
        "reviewedAt": "2026-10-15",
        "fields": [
          "name",
          "availability",
          "fp16Bf16DenseTflops",
          "fp8DenseTflops",
          "fp4DenseTflops",
          "memory",
          "memoryBandwidthTBs",
          "tdpW",
          "interconnect",
          "processNode"
        ],
        "note": "Datasheet's individual-GPU column for GB200 NVL72: its sparse FP4/FP8/BF16 figures (20/10/5 PF) halved, as its footnote directs, to 10/5/2.5 PF dense; the rack page's totals divide to the same. 186 GB HBM3E at 8 TB/s and a TDP configurable up to 1,200 W per GPU.",
        "sources": [
          {
            "label": "NVIDIA Blackwell datasheet",
            "url": "https://dam-cdn.nvd.orangelogic.com/AssetLink/y441155802qub41q118b2852i557jem5.pdf"
          },
          {
            "label": "NVIDIA GB200 NVL72 specifications",
            "url": "https://www.nvidia.com/en-us/data-center/gb200-nvl72/"
          }
        ]
      }
    },
    {
      "id": "mi325x",
      "vendor": "AMD",
      "name": "Instinct MI325X",
      "launch": "2025-02",
      "availability": "shipping",
      "fp16Bf16DenseTflops": 1307,
      "fp8DenseTflops": 2614,
      "fp4DenseTflops": null,
      "memory": 256,
      "memoryUnit": "GB",
      "memoryBandwidthTBs": 6,
      "tdpW": 1000,
      "interconnect": "Infinity Fabric",
      "processNode": "TSMC 5/6nm",
      "cloudOnly": false,
      "est": true,
      "notes": "MI300X refresh with HBM3e.",
      "specReview": {
        "reviewedAt": "2026-10-15",
        "fields": [
          "name",
          "availability",
          "fp16Bf16DenseTflops",
          "fp8DenseTflops",
          "fp4DenseTflops",
          "memory",
          "memoryBandwidthTBs",
          "tdpW",
          "interconnect",
          "processNode"
        ],
        "note": "Dense rates, 256 GB HBM3E and 6 TB/s confirmed.",
        "sources": [
          {
            "label": "AMD MI325X specifications",
            "url": "https://www.amd.com/en/products/accelerators/instinct/mi300/mi325x.html"
          },
          {
            "label": "AMD MI325X datasheet",
            "url": "https://www.amd.com/content/dam/amd/en/documents/instinct-tech-docs/product-briefs/instinct-mi325x-datasheet.pdf"
          }
        ]
      }
    },
    {
      "id": "rtx5090",
      "vendor": "NVIDIA",
      "name": "GeForce RTX 5090",
      "launch": "2025-01",
      "availability": "shipping",
      "fp16Bf16DenseTflops": 209.5,
      "fp8DenseTflops": 419,
      "fp4DenseTflops": 1676,
      "memory": 32,
      "memoryUnit": "GB",
      "memoryBandwidthTBs": 1.79,
      "tdpW": 575,
      "interconnect": "PCIe 5.0",
      "processNode": "TSMC 4N",
      "cloudOnly": false,
      "est": false,
      "notes": "Consumer Blackwell with FP4 support. Tensor rates are NVIDIA's FP32-accumulate figures; the card's 2× FP16-accumulate rates are not comparable with data-center specifications.",
      "specReview": {
        "reviewedAt": "2026-10-15",
        "fields": [
          "name",
          "fp16Bf16DenseTflops",
          "fp8DenseTflops",
          "fp4DenseTflops",
          "memory",
          "memoryBandwidthTBs",
          "tdpW",
          "interconnect",
          "processNode"
        ],
        "note": "Dense FP32-accumulate tensor rates: BF16 209.5 TFLOPS, FP8 419 TFLOPS, FP4 1,676 TFLOPS; process TSMC 4N. The whitepaper's 2× FP16-accumulate rates are not comparable with data-center specifications.",
        "sources": [
          {
            "label": "NVIDIA RTX Blackwell GPU Architecture whitepaper V1.1, Appendix A, Table 3",
            "url": "https://images.nvidia.com/aem-dam/Solutions/geforce/blackwell/nvidia-rtx-blackwell-gpu-architecture.pdf"
          },
          {
            "label": "NVIDIA GeForce RTX 5090",
            "url": "https://www.nvidia.com/en-us/geforce/graphics-cards/50-series/rtx-5090/"
          }
        ]
      }
    },
    {
      "id": "b200",
      "vendor": "NVIDIA",
      "name": "B200 (HGX)",
      "launch": "2024-12",
      "availability": "shipping",
      "fp16Bf16DenseTflops": 2250,
      "fp8DenseTflops": 4500,
      "fp4DenseTflops": 9000,
      "memory": 180,
      "memoryUnit": "GB",
      "memoryBandwidthTBs": 7.7,
      "tdpW": 1000,
      "interconnect": "NVLink 5 · 1.8 TB/s",
      "processNode": "TSMC 4NP",
      "cloudOnly": false,
      "est": true,
      "notes": "Dual-die Blackwell; first NVIDIA part with FP4 tensor formats.",
      "specReview": {
        "reviewedAt": "2026-10-15",
        "fields": [
          "name",
          "availability",
          "fp16Bf16DenseTflops",
          "fp8DenseTflops",
          "fp4DenseTflops",
          "memory",
          "memoryBandwidthTBs",
          "tdpW",
          "interconnect",
          "processNode"
        ],
        "note": "HGX B200 column: 7.7 TB/s per GPU (62 TB/s per board) replaces 8 TB/s, which DGX B200 pages still list. Per-GPU rates are derived from the eight-GPU table.",
        "sources": [
          {
            "label": "NVIDIA HGX specifications",
            "url": "https://www.nvidia.com/en-us/data-center/hgx/"
          },
          {
            "label": "NVIDIA Blackwell datasheet",
            "url": "https://dam-cdn.nvd.orangelogic.com/AssetLink/y441155802qub41q118b2852i557jem5.pdf"
          }
        ]
      }
    },
    {
      "id": "trainium2",
      "vendor": "AWS",
      "name": "Trainium2",
      "launch": "2024-12",
      "availability": "shipping",
      "fp16Bf16DenseTflops": 667,
      "fp8DenseTflops": 1299,
      "fp4DenseTflops": null,
      "memory": 96,
      "memoryUnit": "GiB",
      "memoryBandwidthTBs": 2.9,
      "tdpW": 500,
      "interconnect": "NeuronLink v3 · 1.28 TB/s",
      "processNode": null,
      "cloudOnly": true,
      "est": true,
      "notes": "AWS Neuron publishes dense BF16/FP16/TF32 and FP8 separately from sparse throughput. Board power remains an earlier estimate.",
      "specReview": {
        "reviewedAt": "2026-10-15",
        "fields": [
          "availability",
          "fp16Bf16DenseTflops",
          "fp8DenseTflops",
          "fp4DenseTflops",
          "memory",
          "memoryUnit",
          "memoryBandwidthTBs",
          "interconnect"
        ],
        "note": "Dense compute and per-chip memory/interconnect; the 500 W board power remains a secondary estimate.",
        "sources": [
          {
            "label": "AWS Neuron Trainium2 architecture",
            "url": "https://awsdocs-neuron.readthedocs-hosted.com/en/latest/about-neuron/arch/neuron-hardware/trainium2.html"
          }
        ]
      }
    },
    {
      "id": "tpu-v6e",
      "vendor": "Google",
      "name": "TPU v6e (Trillium)",
      "launch": "2024-10",
      "availability": "shipping",
      "fp16Bf16DenseTflops": 918,
      "fp8DenseTflops": 918,
      "fp4DenseTflops": null,
      "memory": 32,
      "memoryUnit": "GiB",
      "memoryBandwidthTBs": 1.64,
      "tdpW": null,
      "interconnect": "ICI · 256-chip pods",
      "processNode": null,
      "cloudOnly": true,
      "est": false,
      "notes": "4.7× the peak compute of v5e.",
      "specReview": {
        "reviewedAt": "2026-10-15",
        "fields": [
          "availability",
          "fp16Bf16DenseTflops",
          "fp8DenseTflops",
          "fp4DenseTflops",
          "memory",
          "memoryUnit",
          "memoryBandwidthTBs",
          "tdpW",
          "interconnect"
        ],
        "note": "Per-chip architecture comparison; FP8 throughput is explicitly listed, not inferred from BF16.",
        "sources": [
          {
            "label": "Google Cloud TPU7x architecture",
            "url": "https://docs.cloud.google.com/tpu/docs/tpu7x"
          },
          {
            "label": "Google Cloud TPU v6e",
            "url": "https://docs.cloud.google.com/tpu/docs/v6e"
          }
        ]
      }
    },
    {
      "id": "gaudi3",
      "vendor": "Intel",
      "name": "Gaudi 3",
      "launch": "2024-09",
      "availability": "shipping",
      "fp16Bf16DenseTflops": 1678,
      "fp8DenseTflops": 1678,
      "fp4DenseTflops": null,
      "memory": 128,
      "memoryUnit": "GB",
      "memoryBandwidthTBs": 3.7,
      "tdpW": 900,
      "interconnect": "24×200 GbE RoCE",
      "processNode": "TSMC 5nm",
      "cloudOnly": false,
      "est": true,
      "notes": "Priced aggressively; FP8 and BF16 share the same MME throughput.",
      "specReview": {
        "reviewedAt": "2026-10-15",
        "fields": [
          "name",
          "availability",
          "fp16Bf16DenseTflops",
          "fp8DenseTflops",
          "fp4DenseTflops",
          "memory",
          "memoryBandwidthTBs",
          "tdpW",
          "interconnect",
          "processNode"
        ],
        "note": "Intel's July 2025 paper gives 1,678 TFLOPS BF16/FP8 MME at 900 W; its 2024 Hot Chips deck said 1,835.",
        "sources": [
          {
            "label": "Intel Gaudi 3 white paper (Rev. 3)",
            "url": "https://cdrdv2-public.intel.com/817486/gaudi-3-ai-accelerator-white-paper.pdf"
          }
        ]
      }
    },
    {
      "id": "h200",
      "vendor": "NVIDIA",
      "name": "H200 SXM",
      "launch": "2024-06",
      "availability": "shipping",
      "fp16Bf16DenseTflops": 989,
      "fp8DenseTflops": 1979,
      "fp4DenseTflops": null,
      "memory": 141,
      "memoryUnit": "GB",
      "memoryBandwidthTBs": 4.8,
      "tdpW": 700,
      "interconnect": "NVLink 4 · 900 GB/s",
      "processNode": "TSMC 4N",
      "cloudOnly": false,
      "est": true,
      "notes": "Same compute as H100; HBM3e lifts capacity 1.8× and bandwidth 1.4×.",
      "specReview": {
        "reviewedAt": "2026-10-15",
        "fields": [
          "name",
          "availability",
          "fp16Bf16DenseTflops",
          "fp8DenseTflops",
          "fp4DenseTflops",
          "memory",
          "memoryBandwidthTBs",
          "tdpW",
          "interconnect",
          "processNode"
        ],
        "note": "SXM column; sparse tensor figures divided by two, with existing whole-TFLOPS rounding retained.",
        "sources": [
          {
            "label": "NVIDIA H200 specifications",
            "url": "https://www.nvidia.com/en-us/data-center/h200/"
          }
        ]
      }
    },
    {
      "id": "h100nvl",
      "vendor": "NVIDIA",
      "name": "H100 NVL",
      "launch": "2024-03",
      "availability": "shipping",
      "fp16Bf16DenseTflops": 835.5,
      "fp8DenseTflops": 1670.5,
      "fp4DenseTflops": null,
      "memory": 94,
      "memoryUnit": "GB",
      "memoryBandwidthTBs": 3.9,
      "tdpW": 400,
      "interconnect": "NVLink bridge · 600 GB/s",
      "processNode": null,
      "cloudOnly": false,
      "est": true,
      "notes": "Dual-slot PCIe H100 with 94 GB of HBM3, sold in NVLink-bridged pairs. Launch month is an estimate: the first general availability found is Azure's NC H100 v5 in March 2024.",
      "specReview": {
        "reviewedAt": "2026-10-24",
        "fields": [
          "name",
          "availability",
          "fp16Bf16DenseTflops",
          "fp8DenseTflops",
          "memory",
          "memoryBandwidthTBs",
          "tdpW",
          "interconnect"
        ],
        "note": "NVL column: sparse 1,671 BF16 and 3,341 FP8 TFLOPS halved; 94 GB HBM3 at 3.9 TB/s (3,938 GB/s in the brief), 400 W maximum by default, NVLink bridge at 600 GB/s. Neither document states a process node.",
        "sources": [
          {
            "label": "NVIDIA H100 specifications",
            "url": "https://www.nvidia.com/en-us/data-center/h100/"
          },
          {
            "label": "NVIDIA H100 NVL product brief (PB-11773)",
            "url": "https://www.nvidia.com/content/dam/en-zz/Solutions/Data-Center/h100/PB-11773-001_v01.pdf"
          }
        ]
      }
    },
    {
      "id": "mi300x",
      "vendor": "AMD",
      "name": "Instinct MI300X",
      "launch": "2023-12",
      "availability": "shipping",
      "fp16Bf16DenseTflops": 1307,
      "fp8DenseTflops": 2614,
      "fp4DenseTflops": null,
      "memory": 192,
      "memoryUnit": "GB",
      "memoryBandwidthTBs": 5.3,
      "tdpW": 750,
      "interconnect": "Infinity Fabric",
      "processNode": "TSMC 5/6nm",
      "cloudOnly": false,
      "est": true,
      "notes": "CDNA 3 chiplet design; led on memory capacity at launch.",
      "specReview": {
        "reviewedAt": "2026-10-15",
        "fields": [
          "name",
          "availability",
          "fp16Bf16DenseTflops",
          "fp8DenseTflops",
          "fp4DenseTflops",
          "memory",
          "memoryBandwidthTBs",
          "tdpW",
          "interconnect",
          "processNode"
        ],
        "note": "Dense rates confirmed; the datasheet's more precise 1,307.4/2,614.9 TFLOPS round to the table values.",
        "sources": [
          {
            "label": "AMD MI300X specifications",
            "url": "https://www.amd.com/en/products/accelerators/instinct/mi300/mi300x.html"
          },
          {
            "label": "AMD MI300X datasheet",
            "url": "https://www.amd.com/content/dam/amd/en/documents/instinct-tech-docs/data-sheets/amd-instinct-mi300x-data-sheet.pdf"
          }
        ]
      }
    },
    {
      "id": "tpu-v5p",
      "vendor": "Google",
      "name": "TPU v5p",
      "launch": "2023-12",
      "availability": "shipping",
      "fp16Bf16DenseTflops": 459,
      "fp8DenseTflops": 459,
      "fp4DenseTflops": null,
      "memory": 95,
      "memoryUnit": "GiB",
      "memoryBandwidthTBs": 2.77,
      "tdpW": null,
      "interconnect": "ICI 3D torus · 8,960-chip pods",
      "processNode": null,
      "cloudOnly": true,
      "est": false,
      "notes": "Announced alongside Gemini 1.0 (Dec 2023), which was trained on TPU v4 and v5e.",
      "specReview": {
        "reviewedAt": "2026-10-15",
        "fields": [
          "availability",
          "fp16Bf16DenseTflops",
          "fp8DenseTflops",
          "fp4DenseTflops",
          "memory",
          "memoryUnit",
          "memoryBandwidthTBs",
          "tdpW",
          "interconnect"
        ],
        "note": "Per-chip table; FP8 runs at the BF16 rate and capacity is specified in GiB.",
        "sources": [
          {
            "label": "Google Cloud TPU v5p",
            "url": "https://docs.cloud.google.com/tpu/docs/v5p"
          },
          {
            "label": "Google Cloud TPU7x architecture",
            "url": "https://docs.cloud.google.com/tpu/docs/tpu7x"
          }
        ]
      }
    },
    {
      "id": "gh200",
      "vendor": "NVIDIA",
      "name": "GH200 (96 GB)",
      "launch": "2023-11",
      "availability": "shipping",
      "fp16Bf16DenseTflops": 990,
      "fp8DenseTflops": 1979,
      "fp4DenseTflops": null,
      "memory": 96,
      "memoryUnit": "GB",
      "memoryBandwidthTBs": 4,
      "tdpW": null,
      "interconnect": "NVLink-C2C · 900 GB/s",
      "processNode": null,
      "cloudOnly": false,
      "est": false,
      "notes": "The Hopper GPU of a Grace Hopper superchip, in its 96 GB HBM3 version (the one rented by the hour). NVIDIA publishes power only for the whole module, CPU and memory included.",
      "specReview": {
        "reviewedAt": "2026-10-24",
        "fields": [
          "name",
          "availability",
          "fp16Bf16DenseTflops",
          "fp8DenseTflops",
          "memory",
          "memoryBandwidthTBs",
          "interconnect"
        ],
        "note": "96 GB HBM3 column: 990 BF16 and 1,979 FP8 TFLOPS dense, up to 4 TB/s, NVLink-C2C 900 GB/s. Power is published only for the module (450 to 1,000 W, memory, CPU and GPU together), so power stays empty.",
        "sources": [
          {
            "label": "NVIDIA GH200 Grace Hopper Superchip datasheet",
            "url": "https://dam-cdn.nvd.orangelogic.com/AssetLink/tkno03fa645gb7f33w60rf200d330420.pdf"
          }
        ]
      }
    },
    {
      "id": "l40s",
      "vendor": "NVIDIA",
      "name": "L40S",
      "launch": "2023-10",
      "availability": "shipping",
      "fp16Bf16DenseTflops": 362.05,
      "fp8DenseTflops": 733,
      "fp4DenseTflops": null,
      "memory": 48,
      "memoryUnit": "GB",
      "memoryBandwidthTBs": 0.864,
      "tdpW": 350,
      "interconnect": "PCIe 4.0",
      "processNode": null,
      "cloudOnly": false,
      "est": true,
      "notes": "Ada Lovelace data-center card with 48 GB of GDDR6, not HBM, and no NVLink. Launch month is an estimate: NVIDIA said in August 2023 that it would be available from that fall.",
      "specReview": {
        "reviewedAt": "2026-10-15",
        "fields": [
          "name",
          "availability",
          "fp16Bf16DenseTflops",
          "fp8DenseTflops",
          "fp4DenseTflops",
          "memory",
          "memoryBandwidthTBs",
          "tdpW",
          "interconnect"
        ],
        "note": "Dense tensor rates are the unstarred figures (BF16 362.05, FP8 733 TFLOPS); the starred sparse ones are excluded, and no FP4 format is listed. 48 GB GDDR6 at 864 GB/s, 350 W, PCIe Gen4 x16 without NVLink. The page states no process node.",
        "sources": [
          {
            "label": "NVIDIA L40S specifications",
            "url": "https://www.nvidia.com/en-us/data-center/l40s/"
          }
        ]
      }
    },
    {
      "id": "tpu-v5e",
      "vendor": "Google",
      "name": "TPU v5e",
      "launch": "2023-08",
      "availability": "shipping",
      "fp16Bf16DenseTflops": 197,
      "fp8DenseTflops": null,
      "fp4DenseTflops": null,
      "memory": 16,
      "memoryUnit": "GB",
      "memoryBandwidthTBs": 0.82,
      "tdpW": null,
      "interconnect": "ICI 2D torus",
      "processNode": null,
      "cloudOnly": true,
      "est": false,
      "notes": "Efficiency-tier TPU; INT8 393 TOPS.",
      "specReview": {
        "reviewedAt": "2026-10-15",
        "fields": [
          "availability",
          "fp16Bf16DenseTflops",
          "fp8DenseTflops",
          "fp4DenseTflops",
          "memory",
          "memoryUnit",
          "memoryBandwidthTBs",
          "tdpW",
          "interconnect"
        ],
        "note": "197 TFLOPS BF16 and 393 INT8 TOPS per chip; no FP8, FP4 or power figure is published. 0.82 TB/s follows Google's Trillium comparison; the v5e table's 800 GiBps would read 0.86.",
        "sources": [
          {
            "label": "Google Cloud TPU v5e",
            "url": "https://docs.cloud.google.com/tpu/docs/v5e"
          }
        ]
      }
    },
    {
      "id": "l4",
      "vendor": "NVIDIA",
      "name": "L4",
      "launch": "2023-03",
      "availability": "shipping",
      "fp16Bf16DenseTflops": 121,
      "fp8DenseTflops": 242,
      "fp4DenseTflops": null,
      "memory": 24,
      "memoryUnit": "GB",
      "memoryBandwidthTBs": 0.3,
      "tdpW": 72,
      "interconnect": "PCIe 4.0",
      "processNode": "TSMC 4N",
      "cloudOnly": false,
      "est": false,
      "notes": "Low-profile 72 W Ada inference card with 24 GB of GDDR6 and no NVLink.",
      "specReview": {
        "reviewedAt": "2026-10-24",
        "fields": [
          "name",
          "availability",
          "fp16Bf16DenseTflops",
          "fp8DenseTflops",
          "fp4DenseTflops",
          "memory",
          "memoryBandwidthTBs",
          "tdpW",
          "interconnect",
          "processNode"
        ],
        "note": "Dense BF16 121 and FP8 242 TFLOPS, the unstarred halves of the sparse figures; 24 GB GDDR6 with ECC at 300 GB/s, 72 W, PCIe Gen4 x16; TSMC 4N. No FP4 format is listed (INT4 only).",
        "sources": [
          {
            "label": "NVIDIA Ada GPU Architecture whitepaper V2.02, Appendix D, Table 5",
            "url": "https://images.nvidia.com/aem-dam/Solutions/Data-Center/l4/nvidia-ada-gpu-architecture-whitepaper-V2.02.pdf"
          },
          {
            "label": "NVIDIA L4 datasheet",
            "url": "https://dam-cdn.nvd.orangelogic.com/AssetLink/8f4cjsr458mk07kxxt608b1ct0t570x7.pdf"
          }
        ]
      }
    },
    {
      "id": "rtx4090",
      "vendor": "NVIDIA",
      "name": "GeForce RTX 4090",
      "launch": "2022-10",
      "availability": "legacy",
      "fp16Bf16DenseTflops": 165.2,
      "fp8DenseTflops": 330.3,
      "fp4DenseTflops": null,
      "memory": 24,
      "memoryUnit": "GB",
      "memoryBandwidthTBs": 1.01,
      "tdpW": 450,
      "interconnect": "PCIe 4.0",
      "processNode": "TSMC 4N",
      "cloudOnly": false,
      "est": false,
      "notes": "Consumer anchor with no NVLink, out of production since late 2024 by press reports (NVIDIA has published no end-of-life notice). Tensor rates are NVIDIA's FP32-accumulate figures; the card's 2× FP16-accumulate rates are not comparable with data-center specifications.",
      "specReview": {
        "reviewedAt": "2026-10-15",
        "fields": [
          "name",
          "fp16Bf16DenseTflops",
          "fp8DenseTflops",
          "fp4DenseTflops",
          "memory",
          "memoryBandwidthTBs",
          "tdpW",
          "interconnect",
          "processNode"
        ],
        "note": "Dense FP32-accumulate tensor rates: BF16 165.2 TFLOPS, FP8 330.3 TFLOPS; no FP4 tensor format. The whitepaper's 2× FP16-accumulate rates are not comparable with data-center specifications.",
        "sources": [
          {
            "label": "NVIDIA Ada GPU Architecture whitepaper V2.02, Appendix A, Table 2",
            "url": "https://images.nvidia.com/aem-dam/Solutions/geforce/ada/nvidia-ada-gpu-architecture.pdf"
          },
          {
            "label": "NVIDIA GeForce RTX 4090",
            "url": "https://www.nvidia.com/en-us/geforce/graphics-cards/40-series/rtx-4090/"
          }
        ]
      }
    },
    {
      "id": "h100pcie",
      "vendor": "NVIDIA",
      "name": "H100 PCIe",
      "launch": "2022-10",
      "availability": "legacy",
      "fp16Bf16DenseTflops": 756,
      "fp8DenseTflops": 1513,
      "fp4DenseTflops": null,
      "memory": 80,
      "memoryUnit": "GB",
      "memoryBandwidthTBs": 2,
      "tdpW": 350,
      "interconnect": "NVLink bridge · 600 GB/s",
      "processNode": "TSMC 4N",
      "cloudOnly": false,
      "est": true,
      "notes": "The 350 W PCIe card on the H100 die, with HBM2e at 2 TB/s. NVIDIA's H100 page now lists only the SXM and NVL parts. Launch month is an estimate: NVIDIA began shipping H100 in October 2022 without naming the form factor.",
      "specReview": {
        "reviewedAt": "2026-10-24",
        "fields": [
          "name",
          "fp16Bf16DenseTflops",
          "fp8DenseTflops",
          "memory",
          "memoryBandwidthTBs",
          "tdpW",
          "interconnect",
          "processNode"
        ],
        "note": "Whitepaper Table 3 PCIe column: 756 BF16 and 1,513 FP8 TFLOPS with FP32 accumulate, half the sparse figures; 350 W, 4N. Bandwidth follows the product brief's 2,000 GB/s peak (the whitepaper says 2,039). No FP4 format is listed; legacy status is editorial, as NVIDIA's H100 page now lists only SXM and NVL.",
        "sources": [
          {
            "label": "NVIDIA Hopper architecture whitepaper",
            "url": "https://dam-cdn.nvd.orangelogic.com/AssetLink/705n6ur546g0uk43w0117r17n8042d73.pdf"
          },
          {
            "label": "NVIDIA H100 PCIe product brief (PB-11133)",
            "url": "https://www.nvidia.com/content/dam/en-zz/Solutions/gtcs22/data-center/h100/PB-11133-001_v01.pdf"
          }
        ]
      }
    },
    {
      "id": "h100",
      "vendor": "NVIDIA",
      "name": "H100 SXM",
      "launch": "2022-10",
      "availability": "shipping",
      "fp16Bf16DenseTflops": 989,
      "fp8DenseTflops": 1979,
      "fp4DenseTflops": null,
      "memory": 80,
      "memoryUnit": "GB",
      "memoryBandwidthTBs": 3.35,
      "tdpW": 700,
      "interconnect": "NVLink 4 · 900 GB/s",
      "processNode": "TSMC 4N",
      "cloudOnly": false,
      "est": true,
      "notes": "Defined the 2023–25 training buildout; the market’s reference chip.",
      "specReview": {
        "reviewedAt": "2026-10-15",
        "fields": [
          "name",
          "availability",
          "fp16Bf16DenseTflops",
          "fp8DenseTflops",
          "fp4DenseTflops",
          "memory",
          "memoryBandwidthTBs",
          "tdpW",
          "interconnect",
          "processNode"
        ],
        "note": "SXM column; sparse tensor figures divided by two, with existing whole-TFLOPS rounding retained.",
        "sources": [
          {
            "label": "NVIDIA H100 specifications",
            "url": "https://www.nvidia.com/en-us/data-center/h100/"
          },
          {
            "label": "NVIDIA Hopper architecture whitepaper",
            "url": "https://dam-cdn.nvd.orangelogic.com/AssetLink/705n6ur546g0uk43w0117r17n8042d73.pdf"
          }
        ]
      }
    },
    {
      "id": "a100",
      "vendor": "NVIDIA",
      "name": "A100 SXM 80GB",
      "launch": "2020-11",
      "availability": "legacy",
      "fp16Bf16DenseTflops": 312,
      "fp8DenseTflops": null,
      "fp4DenseTflops": null,
      "memory": 80,
      "memoryUnit": "GB",
      "memoryBandwidthTBs": 2.04,
      "tdpW": 400,
      "interconnect": "NVLink 3 · 600 GB/s",
      "processNode": "TSMC N7",
      "cloudOnly": false,
      "est": true,
      "notes": "Workhorse of the GPT-3→GPT-4 era.",
      "specReview": {
        "reviewedAt": "2026-10-15",
        "fields": [
          "name",
          "availability",
          "fp16Bf16DenseTflops",
          "fp8DenseTflops",
          "fp4DenseTflops",
          "memory",
          "memoryBandwidthTBs",
          "tdpW",
          "interconnect",
          "processNode"
        ],
        "note": "80GB SXM column; process TSMC N7.",
        "sources": [
          {
            "label": "NVIDIA A100 specifications",
            "url": "https://www.nvidia.com/en-us/data-center/a100/"
          },
          {
            "label": "NVIDIA Ampere architecture whitepaper",
            "url": "https://images.nvidia.com/aem-dam/en-zz/Solutions/data-center/nvidia-ampere-architecture-whitepaper.pdf"
          }
        ]
      }
    },
    {
      "id": "v100",
      "vendor": "NVIDIA",
      "name": "V100 SXM2",
      "launch": "2017-06",
      "availability": "legacy",
      "fp16Bf16DenseTflops": 125,
      "fp8DenseTflops": null,
      "fp4DenseTflops": null,
      "memory": 32,
      "memoryUnit": "GB",
      "memoryBandwidthTBs": 0.9,
      "tdpW": 300,
      "interconnect": "NVLink 2 · 300 GB/s",
      "processNode": "TSMC 12FFN",
      "cloudOnly": false,
      "est": true,
      "notes": "First tensor-core GPU; FP16 only (no BF16).",
      "specReview": {
        "reviewedAt": "2026-10-15",
        "fields": [
          "name",
          "availability",
          "fp16Bf16DenseTflops",
          "fp8DenseTflops",
          "fp4DenseTflops",
          "memory",
          "memoryBandwidthTBs",
          "tdpW",
          "interconnect",
          "processNode"
        ],
        "note": "SXM2 column; FP16 tensor only (no BF16, FP8 or FP4).",
        "sources": [
          {
            "label": "NVIDIA V100 datasheet",
            "url": "https://images.nvidia.com/content/technologies/volta/pdf/volta-v100-datasheet-update-us-1165301-r5.pdf"
          },
          {
            "label": "NVIDIA Volta architecture whitepaper",
            "url": "https://images.nvidia.com/content/volta-architecture/pdf/volta-architecture-whitepaper.pdf"
          }
        ]
      }
    }
  ]
}